/*
*	This is used to test whether ALU works well
*	
*/

`include "../CPU/ALU.v"

module ALU_Test;
	reg[2:0] func;
	reg[31:0] op1,op2;
	wire[31:0] out;
	initial begin
		op1 = 2;
		op2 = 3;
		func = 3'b000;
		#1
		op1 = 13;
		op2 = 15;
		func = 3'b011;
		#1
		op1 = -1;
		op2 = 3;
		func = 3'b111;
		
		
	end
	
	initial begin
		$monitor("time = %0d,op1 = %d,op2 = %d,result = %b",$time,op1,op2,out);
	end
	ALU myALU(op1,op2,func,out);
	
endmodule
